In recent years, a demand for reducing the size of the amplifier for a radio station has greatly arisen. Therefore, techniques of Doherty amplifying circuits and E-class amplifying circuits have been developed as high efficient circuit technologies.
(Doherty Amplifying Circuit)
A Doherty amplifying circuit (hereinafter simply called “Doherty circuit”) is a high efficient circuit including two amplifiers called a main amplifier (also called carrier amplifier) 101 and a peak amplifier 102, ¼-wavelength (λ/4) transmission lines 103 and 104, as depicted in an example of FIG. 13.
Specifically, the Doherty amplifying circuit illustrated in FIG. 13 has a configuration in which the main amplifier 101 is coupled parallel to the peak amplifier 102 and the λ/4 transmission lines 103 and 104 are disposed at the input of the peak amplifier 102 and the output of the main amplifier 101, respectively.
Here, a typical parallel-coupling amplifying apparatus determines the bias conditions of the two amplifiers to be the same, but a Doherty circuit is desired to determine the bias conditions for two amplifiers 101 and 102 to be different from each other. In detail, the main amplifier 101 is set to be in the A-class or AB-class bias and the peak amplifier 102 is set to be in the B-class or C-class bias so as to have reduced bias electricity as compared to the main amplifier 101.
Consequently, when the level of an input signal is low, the peak amplifier 102 is in the off state for the above bias setting while the carrier amplifier 101 amplifies the input signal. When the level of an input signal increases to a certain value or more, the carrier amplifier 101 begins to become saturated, but the peak amplifier 102 turns to the on state, so that both the main amplifier 101 and the peak amplifier 102 operate such that the gain reduction caused by the saturation of the carrier amplifier 101 is compensated by the peak amplifier 102.
A Doherty circuit operates only the main amplifier 101 when the level of an input signal is low, and operates both amplifiers 101 and 102 when the level of the input signal is equal to or larger than a certain value (in other words, the peak amplifier 102 operates only when the level of an input signal is equal to or larger than a certain value), so that an operation with high efficiency can be ensured.
(E-Class Amplifying Circuit)
An E-Class Amplifying Circuit (Hereinafter simply called “E-class circuit”) is a high efficient circuit in which a transistor functions as a switching device. Prior art of an E-class circuit is disclosed in for example, Non-Patent Document 1 below.
FIG. 14 illustrates an example of the configuration of an E-class amplifying circuit. The E-class amplifying circuit of FIG. 14 includes a switching device 201 such as a bipolar transistor or an field-effect transistor (FET), an input inductor 202 coupled parallel to the switching device 201, an LC resonant circuit including an output inductor 203 (having an inductance Ls+ΔL) coupled serially to the switching device 201 and a variable capacitor 204 (having a variable capacity Cm) coupled parallel to the output inductor 203, and a capacitor (shunt capacitor) 205 (having a capacity Cp) and load resistance 206 (having an impedance Z0) both coupled parallel to the switching device 201. The LC resonant circuit may have an output inductor and a capacitor serially connected to each other. The LC resonant circuit may have an output inductor and a capacitor serially connected to each other.
In the E-class amplifier having the above configuration, constants (circuit constants) Ls, ΔL, Cm, and Cp of circuit devices (passive devices) are determined based on an applied voltage Vds, a design frequency f0, and load impedance Z0 such that the conditions (switching conditions) for E-class operation are satisfied.
Under the on/off control over the switching device 201 in the E-class circuit, electricity flows into the switching device 201 while the switching device 201 is on and electricity flows into the shunt capacitor 205 while the switching device 201 is off.
As a result, the switching device 201 is to have a voltage waveform and an electricity waveform which do not temporally coincide with each other, thereby eliminating a loss at the switching device 201, so that the operation efficiency (direct current (DC)-alternating current (AC) conversion efficiency) can be improved.
Further, the LC resonant circuit coupled serially to the output end of the switching device 201 removes high-frequency electricity generated in the circuit, so that only the basic wave can be amplified.
Examples of a high-efficient amplifying circuit known to the public are disclosed in the below Patent Documents 1 to 3 and Non-Patent Document 1.
The technique of Patent Document 1 relates to a linear power amplifier, particularly to a microwave power amplifier for a signal having multiple carrier frequencies. There has been provided a power amplifier which linearly amplifies a multiple-carrier signal in a noise shape at a wide power level. In addition, the Document aims at providing an amplifier and a method of amplifying, with low loss (i.e., preferable DC/RF efficiency), which attains a high DC/RF conversion efficiency at a wide range of the level of an input driving signal. For the above, the Patent Document 1 discloses a configuration in which a number of biased amplifiers networks are coupled into multiple stages so as to respond when the efficiency of a former state amplifier declines.
The technique disclosed in Patent Document 2 relates to a high-efficient integrated power amplifier capable of tuning. Possession of a high Q value is realized over the range adjusted by controlling reactive device (e.g. inductors and capacitors) constituting a power amplifier (E-class amplifier) through the use of a control signal, so that a high-quality output can be generated which is low in high-frequency component and responsive to frequency over a wide frequency range of an input signal.
The technique disclosed in Patent Document 3 aims at providing a high efficient amplifier having two amplifier units whose output-end impedances property match. For the above, impedance convertors are provided so as to be coupled to the output ends of the respective amplifier units through a matching circuit, and a combiner, which couples to the output ends of both impedance convertors and inputs and combines amplified outputs of each of the amplifying units, is provided. According to this circuit configuration, the amplifier units can successfully attain designed impedance values without depending on the operation states of the respective amplifier units.
[Patent Document 1] Japanese Translation of PCT international application No. 2001-502493
[Patent Document 2] Japanese Translation of PCT international application No. 2003-504906
[Patent Document 3] Japanese Laid-Open Patent Publication No. 2003-188651
[Non-Patent Document 1] S. C. Cripps, “RF Power Amplifiers for Wireless Communication. Norwood”, MA: Artech House, 1999, pp. 145-178
The operation in the Doherty circuit varies with an output power (output level).
In detail, providing that the characteristic impedance of the λ/4 transmission line 104 is R0 (=50 Ohms) and the output load of the Doherty circuit is R0/2, only the main amplifier (Carrier Amplifier) 101 operates but the peak amplifier 102 is not activated during a low-output operation when the level of the input signal is low. As a result, as schematically depicted in FIG. 15, the output impedance of the peak amplifier 102 is (ideally) the open state and the output impedance of the main amplifier 101 is apparently 2R0=100 Ohms, which is obtained through impedance conversion over the output load R0/2, because the characteristic impedance of the λ/4 transmission line 104 is R0.
In contrast, during a high-output operation when the level of the input signal is high, the peak amplifier 102 is operating along with the main amplifier 101, so that, as schematically depicted in FIG. 16, both amplifiers 101 and 102 apparently have loaded impedances of R0=50 Ohms. At this time, since the characteristic impedance of the λ/4 transmission line 104 is also R0, the λ/4 transmission line 104 does not carry out impedance conversion (i.e., R0 is in the matching state) and therefore the output impedance of the carrier amplifier 101 is R0=50 Ohms.
Here, assuming that a Doherty circuit adapting a high-efficiency circuit technique is combined with an E-class circuit, that is, E-class amplifiers are applied to the two amplifiers 101 and 102, designed values (optimum values) of the circuit constants Ls, Cm, vary (see FIG. 17) because the output load (load impedance Z0) is regarded as one of the design parameters in an E-class circuit and therefore variation of the output impedance (i.e., the output impedance of a Doherty circuit) varies the load impedance Z0 in conformity with the level of an input signal. However, FIG. 17 assumes that Cp and ΔL vary little in the load impedance range between 50 through 100 Ohms.
Consequently, when the load impedance Z0 is a fixed value, the variation of the load impedance from the Doherty circuit causes the amplification efficiency to be lower, as depicted in FIG. 18.